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Digital Circuit Design Projects and Design Problems

Design Project: Power Supply/Amplifier Design For a Thermoelectrically Cooled Germanium Detector

Voltage Power Supply 

The voltage regulator circuit was constructed using the LM317T, 3 terminal regulator. A heatsink was utilized to cool down the LM317T. The output voltage can be set to anywhere in the range of 1.5 volts to 30 volts. However, for our application we needed a 2.5 volt output voltage. The selection of the desired output voltage comes with choosing appropriate resistance values for R1 and R2. The use of a potentiometer for resister R2 allowed calibration of the desired output voltage. A bridge rectifier was used to receive the AC or DC input. Protection diodes were implemented to prevent the capacitors discharge from running back into the regulator in the event of abnormal operating conditions such as a sudden short circuit on the input or the output or a back emf from the inductive load.

The resistor used for R1 was chosen to be 250 ohms making the voltage drop across it to about 1.25V. This becomes the reference voltage of the regulator. Whatever current is flowing through R1 is also flowing through R2 and thus the sum of the voltage drops across R1 and R2 are the output voltage seen.

            Vout = 1.25 (1+R2/R1) or R2/R1 = (Vout/1.25)-1

 Since we know that our Vout must be approximately 2.5 volts, and we chose R1 to be 250 ohms we can calculate our value for R2.

 

R2 = 250 ohms.

  

Components

 

1N4004 diode                          D1 D2                          2

Capacitor                                 C2                                1

Electrolytic capacitors              

            1000uF                        C1                                1

            10uF                            C3                                1

            100uF                          C4                                1

Resistors                                 

            250 ohm                       R1                                1

            250 ohm                       R2                                1

LM317T regulator                                                         1

Bridge rectifier                                                               1

Heatsink                                                                        1

Transformer (6volt)                                                        1

 Schematic

Voltage Power Supply:

Output Voltage 2.5 Volts

Ouput Current 1.5 Amps

 

Design Problem:

A Moore sequential network has two inputs. X1 and X2. and one output, Z.  The output remains a constant value unless one of the following input sequences occurs:

(a) The input sequence X1X2 = 00,11 causes the output to become 0.

(b) The input sequence X1X2 = 01,11 causes the output to become 1.

(c) The input sequence X1X2 = 10,11 causes the output to toggle.

 

STATE DIAGRAM:

 

State-   A : (Reset)

            B: Received 1st ‘00’

            C: Received ’00, 11’ (success string, output goes to 0)

            D: Received 1st ‘01’

            E: Received ’10’ (1st set of ‘0’ to ‘1’ toggle)

            F: Received ‘0111’ (success string, output goes to 1)

            G: Received ‘1011’ (toggles from ‘0’ to ‘1’)

            H: Received ‘10’ (1st set of ‘1’ to ‘0’ toggle)

            I : Received ‘1011’(toggles from ‘1’ to ‘0’)

 

 

 

Design Project: State Sequencers

 

Objective:

            The objective of this lab was to design, analyze and employ a state sequencer that can be utilized to control digitally designed systems.

 

Materials:

            The materials used in this lab experiment were a Quad 2-Input NAND chip (SN7400), a Hex INVERTER (SN7404), and a Dual J-K Flip-Flop (SN74107).

 

State diagram:

 

 State Table:

                                   

A B C D

A* B* C* D*

0  0  0  0

0    0    0   1

0  0  0  1

0    0    1   1

0  0  1  1

0    1    0   1

0  1  0  1

0    1    1   1

0  1  1  1

1    0    0   0

1  0  0  0

1    0    0   1

1  0  0  1

1    0    1   1

1  0  1  1

1    1    0   1

1  1  0  1

1    1    1   1

1  1  1  1

0    0    0   0

 

Excitation Table:

A B C D

JA KA  JB KB  JC KC  JD KD

0  0  0 0

 0   X     0   X     0   X     1   X

0  0  0 1

 0   X     0   X     1   X     X  0

0  0  1 1

 0   X     1   X     X  1      X  0

0  1  0 1

 0   X     X   0     1   X     X  0

0  1  1 1

 1   X     X   1     X  1      X  1

1  0  0 0

 X  0      0   X     0   X     1  X

1  0  0 1

 X  0      0   X     1   X     X  0

1  0  1 1

 X  0      1   X     X  1      X  0

1  1  0 1

 X  0      X   0     1   X     X  0

1  1  1 1

 X  1      X   1     X  1      X  1

 

 Karnaugh Map:

 

                                             JA                                                                      KA

                                              

                                             JB                                                       KB

                                             

                                            JC                                                         KC                

                                            

                                             JD                                                                          KD

                      

JA = BC     KA = BC                            JB= C        KB = C           

JC = D        KC = 1                                JD = 1        KD = BC

 

 Schematic Diagram:

                       

 

Exercise 1:

 

If Tg is the gate delay and Td is the Flip-Flop time delay, what is the maximum frequency that can be used to clock each of the  two sequencers you connected in this lab?

 

We know that the total time delay is equal to Tg + Td.  Therefore, the maximum frequency that can be used to clock each of the two sequencers is 1/ (Tg+Td).

 

State diagram:

 

State Table:

A B C

JA KA

JB KB

JC KC

A* B* C*

0  0  0

 0    0  

 0   1

 1    1

0    0   1

0  0  1

 0    0

 0   1

 1    1

0    1   0

0  1  0

 1    1

 0   1

 0    1

1    0   0

0  1  1

 1    1

 0   1

 0    1

1    0   0

1  0  0

 0    0

 0   1 

 1    1

1    1   1

1  0  1

 0    0

 1   1

 1    1

1    1   0

1  1  0

 1    1

 0   1 

 0    1

0    0   0

1  1  1

 1    1

 1   1

 0    1

0    0   0

(* Note:  I used the Function Table for a J-K flip-flop to find A, B, and C Next State)

Input Equations:

            JA = B             KA = B            JB = ( A’ C’)’       KB = 1       JC = B’           KC = 1

 

Schematic Diagram:

 

           

 

Conclusion:

            Experiment 1 served as a great exercise to get familiar with the behavior that J-K flip flops can exhibit.  Two experiments were performed in which a counting device was logically designed then tested. 

            The first experiment performed a count that counted in the order specified by the pre-laboratory instructions.  The experiment successfully produced the count that it was designed to perform.  Few problems occurred while debugging the circuit when first connected. 

 

 

Project :  TRAFFIC LIGHT

1.         Discussion of the concepts used in the project.

 

This project had two experimental steps that eventually led into the development of a traffic controller. The first approach involved designing a counter that would count to fifty-nine.  This would later serve as the interval between changes in the traffic light states.  This circuit design was achieved by using two 74LS163 counters.  The first counter had the task of counting up to nine while the second counter had the task of counting up to five only after the first counter’s had cycled through one time.  To integrate these two counters, the first counter’s logical nine was NANDed and routed back to its clear pin to be reset to repeat another cycle.  This output coming from this NAND gate was then inverted and then by routed into the second counters clock input where a cycle (0 – 9) can be detected by the second counter.  When second counter detects this signal, it then increments itself by one.  The second counter increments by one until it reaches it’s logical five, where there after, logical five is sent through an NAND gate and routed back into it’s clear to make the chip reset itself at the end of one complete cycle (0 – 5).  To display the results of this 1 minute counter, the outputs of the two counters were then routed to two 7447 decoders. The counters results were then outputted from the decoders (7 outputs per decoder) into a pair of resister networks (330 ohm) consisting of 7 resistors per network. The pair of 7 out puts were then routed from each resistor network into a pair of common anode 7 segment LED displays (one LED per resistor network).  The LED’s provided 7 diodes per display piece that when powered, displayed the corresponding counting from 0 – 59).

The second experimental step involved designing the controller system for the traffic controller.  To design this control system, a pair of positive edge JK flip-flops were used (74LS109A).  The circuit was designed with a pedestrian request as well which allows a pedestrian to request the lights to all turn red for one minute.  The circuit was connected as follows:  For flip-flop A, Q was routed into flip-flop B’s K input and was also NORed with QNOT which then lead into the J input of flip-flop A. Pin K was connected to ground as it was active low.  QNOT was routed to flip-flop B’s J as well as to two separate NAND gates where it was NANDed with flip-flop B’s Q as well as flip-flop B’s QNOT.  These two NAND gates essentially became our outputs to the red and green led.  The way in which the pedestrian request was integrated into this circuit was by connecting a single dip switch with a 1k resistor up to Vcc where it would then lead to an NOR gate to be NORed with the result of the Q and QNOT that it itself was producing.  

           

2.       Design, including the pin connection diagram.

 

The design for this circuit included the following:

            1 - 1 bit dipswitch

                        1 – 555 clock

1 – 1k-resistor network (8 resistors)

                        1 – 7404 inverter.

                        2 – JK positive edge flip-flop (74LS109A)

                        2 – 7 segment 7447 decoders (active low, common anode)

                        2 – 330 ohm resistor network (7 resistors per network)

                        2 – 7 segment LED displays (common anode)

                        2 – green and red led.

                        2 – Quad 2-input NAND gate (4011)

                        2 – Quad 2-input NOR gate (4001)

                        2 – Synchronous 4 bit counter (74LS163

 

3.       Testing procedure and any debugging.

            The testing procedure and debugging was a very important part of the construction and learning process in this circuit. The circuit was completely assembled and neither led would light up as a result.  This called for a thorough investigation into where the problem was coming from and how to correct the problem once it was located.  A voltmeter was often used to detect just how far the signal from the input would travel before experiencing difficulty.  It was equally important to use a volt meter to test the pedestrian request.  To test it, we simply detected voltage directly after the switch to see whether or not the signal was 1 or 0.  It was a very effective way to identify the problems within the system.  Other methods of debugging were directly associated with the parts burning out.  Many instances occurred where it was believed that there may be a problem with the logic in the circuit only to later find out that a counter or an led was burned out. Much to the disappointment of the builder(me),  it served as a good learning experience.  Another factor as seen in all the projects worked on, was loose wiring or in fact wires that had been connected backward or not connected at all.  After working on three projects, the importance of effective debugging techniques was evidently made clear. 

4.       Results

          The results to the project were as expected for each and every individual step that led up to the final result. The first experimental step was expected to count from 0 – 59 and display this count two 7 segment LEDs . The expected result was exactly what the experimental result came to be.  The second and final experimental step was expected to produce a traffic controlling system in which a pedestrian request was also implemented into the circuit.  This expected result after considerable debugging, came to meet the experimental results as well.

5.       Conclusion

          In conclusion, the project was a complete success and many things were learned in the process.  One of the most important things learned in the development of the project was how important it is debug a system.  Knowing the logic behind how a circuit works is not enough.  It is equally important to identify the problem and if possible identify the potential problems that can occur.  Another very important aspect learned was the many application that can be used with flip-flops, counters, and clocks. The 2 experimental steps that led to the completion of the circuit were provided a comprehensive understanding of how a complicated circuit can be broken down into smaller steps.       

 

 

Project :  CALCULATOR (adder and multiplier)

1.         Discussion of the concepts used in the project.

 

This project had three experimental steps that eventually led into the development of an adding and multiplying device. The first approach involved integrating an eight-bit dipswitch (keyboard input) to send a signal through a 1k-resistor network consisting of 8 resistors.  This signal served as the input into a pair of common anode 7 segment 7447 decoders.  The decoders then had the job of translating the hexadecimal numeric value provided by the input (highest value 9 - 0110 per 4 switches).  The result was then outputted from the decoders (7 outputs per decoder) into a pair of resister networks (330 ohm) consisting of 7 resistors per network. The pair of 7 out puts were then routed from each resistor network into a pair of common anode 7 segment LED displays (one LED per resistor network).  The LED’s provided 7 diodes per display piece that when initiated, displayed the corresponding number entered into the dipswitch in hexadecimal. Since the circuit was built using logic zero, a ninety-nine for example, would be displayed by using 0110 0110 configuration as oppose to logic 1 which would be produced by inputting 1001 1001. In essence, when experiment one was completed it displayed whatever two inputs the user provided like a scoreboard would.

            The second experimental step called for the implementation of an EPROM.  The EPROM used in this circuit was the 2764.  The EPROM was first prepared by erasing.  The process of erasing an EPROM consist of placing the former into a chambered device that after a 15 – 20 minute wait, will clear it of any information previously stored on it.  Once erased, the EPROM can be programmed with whatever logic the user would like on it (in this case, a multiplication table).  The process of programming an EPROM involves using a programming device that is connected as an appendage of a computer.  The EPROM is placed in the attachment, where it can be read, evaluated for errors and most importantly, programmed.  Once the appropriate device has been selected (through the serial # of chip), the desired program can be loaded onto the EPROM.  Following the programming process, it is imperative that the face of the EPROM be covered from ultra- violate light, as it will erase whatever logic has been programmed into it.  The EPROM was incorporated into the circuit described in the first experimental step.  The goal was to convert the conventional output of the circuit, to a circuit that could take two inputs (0 – 9), and perform and display the multiplication between these two numbers.  As it turned out, the EPROM was inserted between the first 1k-resistor network and the pair of decoders.  The EPROM received a total of 8 inputs (4 per numeric input) and a total of 8 outputs (4 per decoder).  All other address pins not being used were grounded to insure proper performance of the EPROM.  The pins associated to OE (output enable) and CE (chip enable) were set to ground. The EPROM performs the multiplication of the two numbers by cross-referencing the inputs with the multiplication table contained within.  As a result the circuit has been converted into a two number multiplier.

            The third and final experimental step involved inserting a second EPROM into the circuit.  The goal was to add the ability to perform addition as well as the existing multiplication between two numbers. The second EPROM was activated with a switch that disabled one EPROM while the other was enabled. The second EPROM when activated by the switch performed the addition between two numerical inputs while the first one when activated performed the multiplication.  The steps to programming the second EPROM are identical to the ones described in the programming of the first EPROM.  The difference would be the code (addition table) that would be stored within.  Once programmed, the EPROM was inserted into the circuit with the same inputs as the first EPROM (from the 1k resistor network) and the outputs led to the appropriate decoder inputs.  The activation process of the two EPROMS was accomplished by utilizing the OE on each EPROM.  The CE on each EPROM is grounded as well as all the address lines not being used. The first EPROM’s OE pin was changed from ground to the input end of an inverter.  The input end of the inverter is also routed to a 1k resistor that leads to Vcc.  It also runs to a switch that is connected to ground.  The second EPROM’s OE pin is routed to the output end of the inverter. This connection configuration will enable the circuit to activate one EPROM at a time depending on the type of operation that the user would like to perform.  The finished circuit is now capable of performing both multiplication and addition operations of two numbers.

 

2.       Design, including the pin connection diagram.

 

            The design for this circuit included the following:

                        1 - 8 bit dipswitch

                        1 – 1k-resistor network (8 resistors)

                        1 – 7404 inverter.

                        2 – 2764 EPROM

                        2 – 7 segment 7447 decoders (active low, common anode)

                        2 – 330 ohm resistor network (7 resistors per network)

                        2 – 7 segment LED displays (common anode)

 

3.       Testing procedure and any debugging.

            The testing procedure and debugging was a very important part of the construction learning process in this circuit.  Often the circuit was completed, and no out put would be displayed on the LED.  This called for a thorough investigation into where the problem was coming from and how to correct the problem once it was located.  A voltmeter was often used to detect just how far the signal from the input would travel before experiencing difficulty.  It was a very effective way to identify the problems within the system.  Other methods of debugging were directly associated with the EPROMs.  Many instances occurred where it was believed that the EPROM may have the incorrect code stored within it.  It was helpful to substitute an EPROM that had already been tested on another system.  This often identified whether it was the original EPROM causing the discrepancy or the wiring.  Often it proved that to be the wiring and a lot of time was salvaged that could have been spent programming the EPROM.  Remarkably, not much debugging was necessary for this project, but the importance of learning effective debugging skills understood as it will be very helpful and necessary in more complicated circuit designs.

4.       Results

          The results to the project were as expected for each and every individual step that led up to the final result. The first experimental step was expected to give a result that would allow two numerical hexadecimal inputs and their corresponding displays on two LEDs . The expected result was exactly what the experimental result came to be.  The second experimental step was expected to produce a result that would allow two numerical inputs to be multiplied with each other and display the corresponding outputs.  The expected results were also exactly what the experimental results came to be.  Finally, the last experimental step was expected to produce a result that would allow two numerical inputs that could (as in experiment two) multiply as well as add each input with each other and display its corresponding output. As expected, the experimental results met up to the expectations of the expected results.

 

5.       Conclusion

          In conclusion, the project was a complete success and many things were learned in the process.  One of the most important things learned in the development of the project was how important it is debug a system.  Knowing the logic behind how a circuit works is not enough.  It is equally important to identify the problem and if possible identify the potential problems that can occur.  Another very important aspect learned was the process of erasing and programming an EPROM.  This project provided a better understanding as to the concept involved in designing a calculating circuit. The 3 experimental steps that led to the completion of the circuit were very helpful in understanding how a complicated circuit is broken down into many little steps.       

 

 

Project :  Traffic Light Controller (using 68HC11 board )

Purpose:           The purpose of this lab was to utilize the 68HC11 to control a traffic light.       

Discussion:      

Specifically, the behavior was to remain at green in the north-south (NS) direction until a signal was received that there were cars waiting in the east-west (EW) direction.  Once the signal in the EW direction was received, the green light in the NS direction turns off and is followed by a yellow light in the NS direction that remains lit for 1 second before going to red. A half a second after the red light in the NS turns on, the red light in the EW direction turns off and the green light in the same direction turns on.  The lights remain in this position for 5 seconds, before performing the same routine described above for these directions.  If for any reason a signal is detected by the emergency detector (PA1), the red lights in both, the NS and EW direction would flash until the signal is no longer detected.

The pin and light configuration was as follows:

 

                        PA0 - EW TRAFFIC SENSOR

                        PA1 - EMERGENCY DETECTOR

                        PA4 - NS GREEN

                        PA5 - NS YELLOW

                        PD2 - NS RED

                        PD3 - EW GREEN

                        PD4 - EW YELLOW

                        PD5 - EW RED

Pin Connection

 

 

 

The C program used to control the behavior described above was as follows:

                       

            #include <hc11.h>

            #include <stdio.h>

                       int l;

                        void one();

                        void five();

                        void half();

                        void ten_sec();

                        void flash();

                        void main(){

                        DDRD = 0xFF;

                                   

                                    while(1)

                                                {         

                                                PORTA = 0x10;          /*green light on PA4 NS*/

                       

                                                PORTD = 0x20;          /* PD5 is EW RED*/

                                                if ((PORTA & 0x01) == 1)  /* if traffic detected PA0*/

                                                          

                                                {

           

                                                PORTA = 0x20;          /*PA5 yellow light NS*/

                                                flash();              /*emergency flash function*/

                                                one();               /*1 second function*/

                                    PORTD = 0x24;          /*PD5 red light EW and PD2 red NS */

                                    PORTA = 0x00;

                                    flash();              /* emergency flash function*/

                                    half();               /* 1/2 second function*/

                                    PORTD = 0x0C;                                                         

                                                five();   /* 5 second function*/

                                                                                  

                                    PORTD = 0x14;          /* PD4 EW yellow and PD2 NS red*/

                                    flash();              /*Emergency flash function*/

                                                one();               /*1 sec function*/

                                    PORTD = 0x24;          /*PD5 red light EW and PD2 red NS */

                                                flash();              /*Emergency flash function*/

                                                half();   /*1/2 sec function*/

                                    PORTD = 0x20;          /*PD5 red light EW*/

                                    PORTA = 0x10;          /*PA4 NS green light*/

                                                five();   /* 5 second function*/

                        }

            }

}

            void one()

            {

                        int i,j;

                        for(i=0;i<=20;i++){

                                    for(j=0;j<4500;j++);

                        }

            }

            void five()         /* Generates a 5 second delay */

            {

                        int i,j;                       

                        for(i=0;i<=100;i++){

                                    for(j=0;j<=4500;j++);

                        }

            }

            void half()         /* Generates a half second delay*/

            {

                        int i,j;

                        for(i=0; i<=10; i++){

                        for(j=0; j<=4500; j++);

                        }

            }

            void ten_sec()               /* Generates a 10 second delay*/

            {         

                        int i,j;

                        for(i=0; i<=200; i++){

                        for(j=0; j<=4500; j++);

                        }

            }

                        void flash(){                  /* Generates the flashing routine for the red lights*/

                        while(PORTA & 0x02)            /* Checks bit PA1 for emergency signal*/

                        {

                                    PORTA = 0x00;          /* Clears PORTA (red lights) */

                                    PORTD = 0x24;          /*PD5 red light EW and PD2 red NS */

                                    one();                           /*Delays for one second*/

                                    PORTD = 0x00;          /*Clears making flashing reds lights*/

                                    one();                           /*Delays for one second*/

                        }

                        }

Project :  Multi-Stage Amplifier Design

Executive summary: 

The multi-stage amplifier was used to design an amplifier circuit that would meet the specifications provided by the customer. The amplifier was to be designed to have a positive gain of 400(+/-5%), an input impedance greater than 10kΩ, an output impedance less than 50Ω, a low frequency cut-off of less than 100Hz, a high frequency cut-off of more than 50 kHz and be able to support a 2V peak to peak output when a 100Ω load is placed on it. The behaviors and characteristics of seven experiments were analyzed and tested. The knowledge acquired through these seven experiments will now be implemented to design this circuit. 

Objective: 

The objectives of this experiment are to design, construct and test a multi-stage amplifier. 

Diagram:

 

Data:

Table 1: Multi-Stage Amplifier Circuit Values.

 

Stage 1

Rs

RB1

RB2

RC1

RE1

Cin

CC1

C1

1.95kΩ

149.5kΩ

35.5kΩ

5001kΩ

1001kΩ

100uf

100uf

100uf

 

 

Stage 2

RBB1

RBB2

RC2

RE2

REe

C2

21.1kΩ

5001kΩ

6.5kΩ

285Ω

1.961kΩ

1.93uf

 

 

Stage 3

RBBB1

RC3

CB2

CBe

RBe

C3

1.188kΩ

2.35kΩ

6pf

8pf

2.35kΩ

100uf

 

 

Stage 4

RBBBB1

RBBBB2

RC3

RC4

RE4

CC2

Cout

Rload

Rload (2v)

25.5kΩ

30.7kΩ

195Ω

195Ω

98.8Ω

100uf

100uf

1000kΩ

98.1Ω

 

(Rload (2v) used for 2v p-p into 100 ohm load resistor)

 

Table 2: Calculated versus Measured values.

 

Calculated

Measured

%difference

Av

413.03

418.8

1.4%

RIN

25995.7

28.8kΩ

10.8%

ROUT

32.9Ω

32Ω

2.73%

FLOW

12.9Hz

52.34Hz

300%(wow)

FHIGH

250.7kHz

12.98kHz

94.8%

100Ω-load

7.5V p-p

7.23V p-p

3.6%

 

Design discussion:

 

The multi-stage amplifier design called for many conditions to be met. To achieve the gain of 400, it was decided upon to use two common emitter configurations. The common emitter configurations as studied in previous experiments proved to deliver high gain when biased to do so therefore it was expected to utilize it in one or more stages. In this case it was utilized for the two center stages of the amplifier circuit. The gain as recommended would set up last as it could be manipulated by simply changing some values around. First the input impedance of the circuit was considered. The design called for input impedance greater than 10kΩ. From experimental experience we observed that the common emitter configuration delivered moderate input impedances. However, we observed the common collector to deliver relatively high input impedance. It was recognized that a common collector configuration would be an acceptable choice to cover the input impedance design. The common collector was biased to achieve input impedance higher than 10kΩ. The relationship  was used and calculated to the value shown in table 2. The values of β were found for each transistor to achieve accurate calculation values. The output impedance was desired to be lower than 50Ω and our experience of the common collector circuit or emitter follower circuit exhibit behavior that would produce output impedance that is relatively low. The common collector circuit was used for the final stage of the circuit design. The β value of the transistor was desired to be at about 280 to make it easier to achieve relatively low output impedance. Through the relationship the output impedance was found to be at 32.84Ω which satisfies the conditions for impedance less than 50Ω. By this point we have met 2 of the six conditions that are needed. We have already established that the first and last stages will be used simply to fulfill the input and output impedances. They will not contribute to the gain of the circuit as a whole. We have also established that the stages in between would best be left to common emitter configurations due to their relatively high gain characteristics. It was decided that two common emitter stages would be biased to achieve the specified gain needed. The second stage was designed to be the multiple of ---100 that we wanted to find. In other words, the third stage would be designed to produce a gain of approximately -100 there by having the second stage set to a gain close to -4. To bias the second stage to have a gain of approximately -4, the relationship AV2 =    - (where Ri2 = 1188K||hie). A gain of approximately -4.226 was calculated. The third stage was designed to produce a gain of close to -100. To do this the relationship Av3 = - (where RL2 = RC3||RBe). The gain produced was satisfactory to produce a total gain of approximately 400. The circuit was then analyzed in p-spice to validate the calculated values found. The circuit was analyzed using the transient response option which produced an output signal that corresponded to a gain of 413.03 as seen in table 2. The gain of the circuit had been validated by p-spice to be within 5% of 400 and could now be tested with a 100 ohm load for a signal of at least 2 volts peak to peak. When a load resistor was placed in the circuit in place of the 1000KΩ resistor, we observed the output to have a value of 3.75 volts. The output voltage into a 100 ohm resistive load was now verified to be within an acceptable position. The two characteristics left to verify were those of the lower and upper cut-off frequencies.  These could be verified by using the ac sweep option in p-spice. By taking .707 of the mid-band gain we could find if both frequencies are within an acceptable range to that required. The lower cut-off frequency was found to be at approximately 12.9Hz while the upper cut-off frequency was found to be at 250.7 kHz. The lower cut-off frequency was required to be less than 100Hz while the upper cut-off frequency was required to be greater than 50 kHz. According to the p-spice analysis, acceptable cut-off frequencies had been achieved.

Analysis:

The multi-stage amplifier circuit was designed using the values located in table 1. A discussion as to the way in which the stages were chosen will be left to the design discussion. The circuit was expected to receive a small input signal of about 10mV but was treated to an input voltage of 40mV which produced clipping on the output signal. When the circuit was powered up it became apparent that the design would need to be change in terms of the 1.95k ohm resistor located by the input. It was discovered that a voltage divider would be utilized to lower the input signal. The change in design was as follows:

            

The circuit on the left was the original design while the circuit on the right is the modification (voltage divider) that was made to get the lower input signal. The lower input signal was essential due to the output getting clipped with a high input signal. Only after the input voltage was lowered did we achieve a nice curve representing the output signal. The gain was then found to be very close to what was expected of the designed circuit as table 2 shows. The input impedance was found by using the method used in all previous experiments which consisted of using the input voltage before our Rs resistor (Vs) and the voltage after the Rs resistor (V2) to find the current (IS) by the relationship (VS – V2) / RS. This current is then used to find RIN by taking the relationship V2 / IS. The input impedance found in the experiment agreed with the calculated value as table 2 shows. The output impedance (ROUT) for the multi-stage circuit was found in a similar form to that of the input impedance and its value is compared and represented in table 2 as well. The lower cut-off frequency was expected to be somewhere around 12.9Hz but was actually found to be at 52.34Hz. Though this produced an astronomically large percentage difference with respect to the value achieved through p-spice, it was still well under the required frequency of 100Hz. The large percentage difference could be attributed to the proto-boards capacitance and the internal capacitance of the transistors. P-spice runs analysis under ideal conditions which we can never have in a lab experiment. For the upper cut-off frequency a value of 12.98 kHz was achieved. This value failed to meet the expectations of a value greater than 50 kHz. Reasons for it falling short can be attributed to transistor internal capacitance that caused to fall before the time that is was expected to fall. The circuit was tested using a 98.1Ω load resistor and found to have an output signal of 7.23 volts peak to peak. This value is compared with that of the p-spice values acquired as table 2 shows.

The multi-stage amplifier was designed to meet the operational specifications enclosed. The gain, input and output impedances, lower and upper cut-off frequencies, and output signal greater than 2v peak to peak with a 100 ohm load were designed, and all but the upper cut-off frequency was found to meet the criteria necessary for this experiment. The exercise served as a great peak into what design work would be like in a working environment.

 

 

Cosmology Engine Theory

 

        Cosmological Engine Theory©

by Michael Pulido

 

The Quick Facts

 

                1.                The universe sprang from a point of infinite density into what it is today.

                2.                Time, space, gravity, dimension, and energy did not exist prior to the Big Bang.

                3.                Black Holes absorb and shred the very fabric of reality within its singularity.

                4.                All forms of energy are governed by the dynamics of a decay rate; a.k.a. half-life.

                5.                Neutrinos can pass through trillions of miles of lead without striking an atom.

                6.                “The Boomerang data confirmed that the shape of the universe is flat.”

 

The Questions

 

                1.                What were the conditions that existed prior to the known universe?

                2.                What is the interrelationship of all things in existence?

                3.                What is the ecological purpose of a Black Hole?

                4.                Why is there a decay rate?

                5.                What purpose does a neutrino and other similar-sized particles serve?

                6.                Why is the universe seemingly flat?

 

Cosmological Engine Theory (CE) — The Breakdown

 

            The popular question is: If everything came from a point of Infinite density before the universe came into existence, where did this density come from? Naturally, the answer itself would be considered impossible, because the logical answer is that everything came from nothing. Let’s call this “nothing” Null Space.

            Now, think of the dynamics of a Black Hole. It’s entire existence is based on having had too much mass; thereby, collapsing in on itself. Instead of calling this a black hole, let’s call this phenomenon a Cosmological Inversion.

 

            To simplify: The relationship between these two dynamic and opposing forces in nature is their common basis for existence: Critical Mass. By keeping this cosmological dynamic in mind, we can move on into other universal dynamics which would require these highly theorized phenomenon, found in nature, to exist.

            In the following paragraphs, I will present a hypothesis that will sound rather academic and possibly, even, naive. Please bear with me and don’t jump to any academic conclusions that will cause you to stop reading. Just follow the logic and you will then see where this is all going, ‘kay?

            By observing the principles of ecology found here on earth, we already acknowledge that just about everything in existence has a purpose which would directly, or indirectly, contribute to the stability of it’s environment — this is generally typical of an enclosed system, or living environment. I submit that these same laws, by nature of ecology, apply to black holes, as well.

            By following the dynamics of a cosmological inversion found in the creation of a black hole, it would not be too great a leap in logic to assume that if a sufficiently massive black hole had acquired so much density within it’s singularity, that it would likely reach another level of “critical mass,” thereby inverting it’s very nature with devastatingly explosive results.

            Now, I will acknowledge that there is no example of a single black hole, or groups of black holes, in the known universe that can be said to have done this. It has also been scientifically stated that they will merely dissipate in time without any more mass available to feed their voracious appetites. But in having stated this, their presence will contribute to the overall ecological dynamics of the CE theory’s universal model.

 

Black Holes

 

            By looking at the general dynamics of a Black Hole, we understand that it warps time and space and can rip the electrons off an atom and tear photons apart; essentially, shredding particles down into their most elementary components possible.

            It is also speculated that a Black Hole can be a possible “white hole” outlet, depositing it’s mass into some other forming universe, if not our own. What particular universe? ... that is subject to much debate and speculation. However, if you were to look closely at the very nature of a Cosmological Inversion, it’s nature is meant to be an exact antithesis of it’s environment. This is what black holes are telling us, “ ... that an antithesis will always be found in nature.”

            By following the preceding conjecture, if we were to apply this antithesis to the nature of the Big Bang Theory, the Big Bang would obviously be a natural antithesis within a universe of “zero” dimensions: Null Space.

            In an almost story-like way, one could say that there was once a universe that existed “out of time,” possessing zero space and zero dimensions, attempting to occupy even less space than it possibly could by definition of it’s very nature. And in it’s vast nature of non-existence, it has compacted itself into such an impossibly small volume, ... that density became a reality. This density, compounding itself within the nature of non-existence, became so impossibly dense, that a cosmological inversion, by it’s very nature to be an antithesis of it’s surroundings, came into Existence.

            How do black holes fit into all this? If you would look at the inherent nature of the proto-universe, it would very much resemble the interior environment of a black hole!

 

Cosmological Convection

 

            In taking this a step further, what I would like to point out to you is that all Black Holes, by their very nature, meet at the very same non-time/non-space coordinates.

            In viewing black holes, functioning as an allegorical sink-hole, all elements that fall within their maw must “drop down” to the lowest point possible in the whole of the universe — this would inevitably lead to the very beginning of time/space and existence.

            Imagine black holes as cone-shaped horns, all with their pointed ends directed toward each other, touching, and fueling creation with the elements of what they can gobble up. This would include any and all black holes —  past, present, and future — connecting to this lowest point stemming back to the beginning of time. It is at this lowest point that all primordial elements will be found existing in their highest possible energy state. I would refer to this non-time/non-space coordinate as the Zero Point.

            Black holes, as we understand them in nature, cannot possibly account for 100% of the mass generated in the Big Bang. However, it is the mechanics behind a black hole which is to be observed and applied to this grand cosmological picture I am presenting. In this picture, black holes contribute to a process I have termed “Cosmological Convection,” being a naturally occurring phenomenon which helps maintain the inherent stability of the cosmos, as does the effects of Null Space — by transcending time and space.

           

The Big Bang: Redefined

 

            You may find this redefinition of the Big Bang as very unique, and somewhat sci-fi in the way it reads. But, if you look at it logically, as I’m sure you will, you will see that it is truly based on sound scientific principles.

 

            Prior to the inception of time and space, there was a point in the center of Null Space which, by it’s very nature, attempted to occupy even less nothingness than it possibly could. By being dimensionally timeless, this central point warped and developed infinite depth, compacting itself in infinitely concentrated ways. It was at this center-point in which this level of concentration began to take on the properties of mass and gravity — gravity being an initial product of infinite compression via Null Space.

            Within the center of this nearly-infinite density, tensions begin to build which gradually generates a General Resonance Field (GRF) which then encompasses it’s entirety. This GRF is the foundation and birthplace of Superstring mechanics; this being the Zero Point.

            Infinite tension begins to generate infinite frequency ranges. Omnidimensional properties manifest within the core, all possibilities of existence take shape as the Universal Resonance Field (URF) is formed. It expands within itself, occupying all possible time and space.

            Similar to high-frequency radiation, time/space will radiate from the center-point of creation in the form of a dimensional, counter-resonance, energy wave-front — a Quantum Wave-front, if you will — which, by it’s very time/space nature, would naturally counteract the infinite pressures of Null Space’s non-existent nature. The very instant time/space counteracts non-dimensional space, cosmic proto-matter will have exploded directly behind the quantum wave-front, having superceded the actual Big Bang event!

            This quantum wave-front would be completely invisible to modern means of detection because it is made up of the very fabric of time/space which makes the tools of detection possible. The only way to view the Big Bang explosion from an outside perspective is if you were actually looking back at it while you rode the leading edge of the quantum wave-front ahead of it!

            What this is implying is that a counter-resonance field had to exist prior to the Big Bang as a byproduct of proto-matter, thereby creating a form of energy which would act in the capacity of an omni-dimensional atmosphere, allowing the Big Bang explosion, and expansion, to become feasiblely possible.

 

The Shape of the Universe

 

            The moments following the Big Bang, to some level, is fairly well-understood by modern physicists and cosmologists. The General Theory of relativity, Quantum Mechanics, Particle Physics, High Energy Physics, and Gravity,  are all pieces of a puzzle that contemporary science is attempting to put together by using Superstring Theory as a possible cosmological framework to build it upon. It is my intention to forward this cosmological model to neatly encompass Superstring theory, as well.

            In regards to “Dark Energy,” it has occurred to me that my CE Theory, in it’s framework, supports the rapidly accelerating dynamics of the known universe and would explain the uniform appearance of the Big Bang radiational background. By understanding the underlying mechanics that led to the formation of the universe as we know it, one could theoretically derive it’s possible shape supported by current scientific evidence. The following is an excerpt from my CE Theory manuscript:

 

The Cosmic Shell:

 

Q: What prevents the Null Space effect from simply crushing the universe into a non-existent point again?

 

A: The dynamically energetic outward pressure of the currently existing universe.

 

The Cosmic Shell is based on an energetic vibrational counter-harmonic principle as it applies to Null Space, thereby canceling out non-existence. This principle is similar to canceling out sound frequencies with a matching counter-frequency C existence vs. non-existence. This, in turn creates a bubble under a uniform pressure composed of omni-dimensional time and space. The very boundaries of this early cosmic shell will be consistently uniform in it=s spherical entirety, similar, in function, to the surface of a sun,  as it encompasses this universal structure. The reason being is that Null Space will always maintain a uniform pressure against this shell; therefore it must be spherical.

However, this sphere=s boundary is not Asolid@ as we understand the concept of a bubble. Think of it more like the turbulent surface of a humongous star emitting “light” within the upper levels of an infinite spectrum of energy.

Using neutrinos as an example in this theoretical model, we already understand that neutrinos can travel, unimpeded, through most any obstacle. They are so small and ephemeral that they can pass through trillions of miles of lead without colliding into another particle of matter. We also know that they fly all over the place occupying all areas of space in fantastic abundance, generated in great quantities by the stars of our universe — this is as it is understood by modern scientific theory.

Now, here is a hypothetical question: “What would happen to a neutrino that encounters the boundaries of known existence?”

One can hypothesize that this encounter would be similar to slamming into a wall of sorts, which really isn’t there. The effect of this encounter would naturally pulverize the neutrino, releasing huge quantities of energy.

With all the neutrinos that are generated by our universe, this would naturally generate an incredibly energetic pressure dome of sorts C more accurately, a pressurized sphere.

Now, this sphere=s size is directly related to the level of energy generated from within. To put this into perspective, at the moment of the big bang, the counter-harmonics were instantly established creating the universal sphere, or bubble, as it was. Time/space asserted itself within this bubble of incredible vastness C by our definition of the concept C  and creation soon unfolded. However, from a null space standpoint, our universe will always be infinitely small when compared to the infinite nature of nothingness beyond the bubble.

This bubble=s “skin” will most likely be a standing wave composed of many layers based upon densities of superstring dynamics encountering an anti-matter effect of perceived mutual annihilation. This could be referred to as a Mutual Cancellation Zone.

Now, if you were to assign a zero vibrational wave-value to infinite non-dimensional space, it would possess similar attributes to that of the lining of a sound-proof room C ultimate nullification! Similarly, like a constant shower of sound, the superstring structure within the Cosmic Shell=s outer layer would decrease in energetic volume until vibrating out of our existence by experiencing an infinite vibrational crescendo within infinite timelessness. This, then, should be referred to as the Dissipation Effect.  

It is by this realization, that it had occurred to me, that the “pulling effect in the vacuum of space” may be directly associated with the dissipation effect which is taking place at the boundaries of this cosmic shell. It’s dynamics would be quite similar to the stretching of an elastic sheet, pulled uniformly from all sides, stretching the interior smoothly apart from it’s central point of origin. This method of dissipation would definitely create an effect similar to Universal Inflation which would account for the universe accelerating apart in recent cosmological observations.

 

A Side-Note: Superstrings do NOT get annihilated in their encounter with Null Space; their inherent multidimensional nature will not allow for it.

            Imagine, if you will, a solitary superstring surrounded by infinite Null Space. This superstring would undergo infinite tension within the infinite crushing effects of Null Space. This infinite tension would cause the Superstring to vibrate upwardly on an infinite multidimensional scale. This would cause it to release a nearly infinite amount of energy which would cause it to simply vibrate out of our perceived existence and manifest within an environment similar to it=s own multidimensional nature. Most likely finding it=s way to a common vibrational point of infinite density experiencing critical mass. Simply put, it could create it=s own Big Bang in another possible/probable reality, ... if not our own.

 

To summarize: the preceding excerpt has stated that the universe is functionally-based upon Black Hole dynamics. These dynamics will always, and inevitably, lead to a Cosmological Inversion based on compression principles, whether it has dimensions of any sort, ... or not.

            In saying this, let’s liken the Cosmos to a Supernova: the forming cosmos explodes outwards with grand-scale radiation and energy. The leading edge of the Quantum Wave-front is naturally spherical and dynamic in its composition and expansion. The Big Bang’s secondary wave-front trails behind it as it functions as the ultimate nebula, conforming to such cosmological laws of expansion and gravitational interaction based on principles in density and electromagnetic lines of force. The leading edge of the quantum wave-front will leave “space” in it’s wake for all Big Bang elements, found within, to expand outwards within it’s boundaries.

            The Cosmic Shell, as it exists, is not perceivable due to it’s quantum foam nature.  The secondary shell — the Big Bang radiational wave-front — will always look uniform from any perspective we would happen to take within it. This is because it is trailing away uniformly in all directions without the impediment of pre-existing gravitational flux; ... especially since that very shell’s boundary once existed and passed through the space we now occupy. So, even with all the galaxies that are in existence, there is not enough matter within them to significantly distort this uniform view of a trailing after-image of this englobing, and expanding, cosmic radiation. What this also means, is that all we will ever see of the Cosmic Shell’s interior will be the residual radiation of the Big Bang, not the invisible time/space wave-front which exists beyond this radiation.

 

Dark Energy Misnomer: CE Update (March 2001)

 

            It would be accurate to state that “Dark Energy,” or “Lambda” is actually a quantum phenomenon produced by the omni-dimensional properties of a dynamically thriving cosmos founded upon the physics of Heisenberg’s Uncertainty Principle. It is in the face of quantum uncertainty — coupled with the multidimensional aspects of superstring theory — which postulates that particulates in one dimension can “transmigrate” into another. Space/time’s quantum nature would generally allow for this dynamic effect (in and of itself), allowing it to continually “fill” space with it’s inherent quantum properties, thereby counteracting the dynamic stresses of space being stretched apart by the cosmological dissipation effect. So long as the universe possesses a dynamic energy state, space/time will have the “fuel” to compensate for this effect of uniform universal evaporation. 

 

Cosmic Entropy

 

            It is through the inherent principles and properties of time/space that we observe the Law of Entropy. By the very fact that the entire universe is based on E=mc˛, time and space must observe a half-life; a.k.a. decay rate. Since entropy is a component of time, it stands to reason that the true interior lining of the outer shell of time/space would exist beyond matter and all material means to perceive it, but is dependant on the energy dynamics of this matter in order to exist.

            Eventually, there will come a “time” when the leading edge of the cosmic supernovae shell will run out of the energy necessary to support itself and will eventually succumb to the effects of inevitable disintegration. All cosmological components within this sphere will unarguably succumb to the effects of entropy — as individual components — and will, too, eventually lose their dynamic state of existence.

            Now, here is the interesting part of this conjecture. The wave-front composed of time and space will eventually lose it’s integrity when faced with the dynamics of Null Space. In the farthest-out reaches of existence, non-existence begins. In the face of non-existence, this leading edge of time will disintegrate beyond sustained regeneration. Within this sphere, all galactic components will have moved so far apart and beyond each other, that light from another galaxy will no longer be visible to one-another.

            Please, allow another excerpt from my manuscript to illustrate:

 

            The expansion of the Universe will not contract while still in a dynamic state. Cosmological Laws of Convection will not permit a settling of masses until the dynamic state of the universe comes completely to it=s lowest point. Toward the end of the universal half-life, this universe will be composed mostly of dark matter and super-massive black holes C age spots for an aging universe.

            At this point, all forms of life C as we may currently understand it C will have ceased to exist in the previous billion years or so. Space/Time will warp and disintegrate in incredibly impossible ways. The relevance of Time will cease to exist in all forms as it will no longer bear meaning in an encroaching, non-existent, universe.

            Whole galaxies will have burned up most all of their vital energy as they will have disintegrate into innumerable black holes of their own creation, to finally collapse into their centralized Galactic Black Hole centers! A dynamically dead universe will, by nature, succumb to the dynamics of Universal Convection. The Cosmic Shell will have run out of fuel to maintain it=s interior pressure. All Points will fall to the center. The universe will turn itself inside-out. As a result, the Ultimate Black Hole will have been formed.

 

To summarize: The universe, like a star in a pitch black sea of nothingness, will continue to shine, burning up all it=s resources, until there is nothing left to keep it in existence.

 

Cosmological Regeneration:

 

Null Space reasserts itself as the original non-dimension from an infinitely timeless perspective. The moment time ends, Null Space will reoccupy the “space” denied it. So that, once again — and from a linear standpoint — for the first time ever (from it=s own infinitesimal perspective), critical mass and Cosmological Inversion occurs.

New Universe!

 

To summarize: By viewing the cosmos from this particular perspective, one can ultimately imagine that it functions in a manner similar to a combustion engine on a simultaneous, multidimensional, level — embracing all possibilities, bursting into existence, inflating, dissipating, and then bursting into existence all over again, ... infinitely. From a biological standpoint, the universe has a “heart-beat.”

 

Note: Andrei Linde had first proposed a Self-Reproducing Universe Theory. His theory is not all that dissimilar from the dynamics of this model when viewed from a particular viewpoint.

 

Multiple Universe Theory:

 

The CE supports a Multiple Universe Theory from the standpoint of Null Space. Null Space is a non-dimension. It encompasses all of creation from beginning to inevitable end. It is an infinite cosmological constant.

From this Null Space perspective, all Big Bangs are occurring simultaneously. If you were to look upon this universal phenomenon of creation through a prism, you would most likely see an infinite spectrum of multi-dimensional realities.

From our individual universal standpoint, how could we, as a figurative Aultra-violet@ universe, ever comprehend an Ainfra-red universe?@

Impossible. But from a Null Space Perspective, ... not impossible.

 

Super String and Vibrational Universe principles:

 

By establishing the exact conditions in which the Superstring formed, one begins to realize that it is similar to a multifaceted, multidimensional, diamond having formed under infinite pressures.

From the Cosmological Inversion Process, the Super String Theory is easily supported. All vibrational components of a Super String Theory is supported by the Heisenberg Uncertainty Principle at the inception of the Zero Point Model.

This in turn supports the hypothesis, as impossible as it may sound, that all Superstrings are essentially the same superstring vibrating on an infinite spectral vibrational scale occupying all space and time simultaneously within infinite dimensions of it=s own creation! By following this dynamic principle, the ability to replicate is clearly apparent!

            This impossible, yet reasonable, assumption may gives rise to the possibility of multidimensional consciousness based on the Heisenberg uncertainty principle as applied to this Primordial Superstring which occupies all dimensions simultaneously. It does take a certain level of consciousness to comprehend reality. Perhaps consciousness is a dimension that can encompass all possibilities.

 

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