The inverting power amplifier configuration has the advantage of avoiding common-mode input stage distortion, but has a few problems of its own. There are various approaches to solving these problems, and the one I used for my mosfet amplifier designs is illustrated in the following diagrams.
This is the basic feedback arrangement, and the first problem is that the input resistor sets the input impedance, and for a general purpose amplifier we would not want this to be very low. A value of 10k seems a reasonable choice. Increasing the value will add more noise, while much smaller values could be a difficult load for the signal source to drive. Then for an amplifier gain of 20 the feedback resistor needed is 200k. These resistor values are far higher than we would generally use to set the gain of a non-inverting amplifier, and so the various stray capacitances become more significant, particularly the amplifier input capacitance, shown here as 10pF.
The second problem is that the internal impedance of the signal source, Rs, is in series with the 10k input resistor, and so affects the feedback loop gain. Most signal sources can be expected to have a low impedance, but if for example the amplifier is driven directly from a 50k volume control then the source impedance is relatively high and also varies with volume setting. (Unlike a non-inverting amplifier the output noise can be reduced by a high source impedance because this reduces the amplifier gain.) The worst case is if the amplifier is for some reason left with no source connected, it then operates as a unity gain amplifier, and would need heavy internal compensation to maintain stability. This would severely limit the feedback loop gain at high frequencies where we need it to be high to keep distortion down.
Looking at just the phase shift from the output back to the inverting input, this is plotted first for low source impedance (600R) then for a high value (6M):
In both cases there is a high phase shift at high frequencies, almost certainly significant at the unity gain frequency of the feedback loop, where additional phase lag is not a good thing. The effect is far worse with a high impedance source.
The first solution we could try is to add a small capacitor in parallel with the 200k feedback resistor. We could start with just some convenient small value, here 10p is shown:
The phase shifts now look far better:
The positive phase shift with a low Z source is no problem, and the negative phase is fairly small with high Z, and probably not near the unity gain frequency, so not a danger to stability.
Unfortunately there is now another problem, which is that at high frequencies the feedback gain from output back to input is determined by the ratio of the capacitor impedances rather than the ratio of the 200k and 10k resistors. The two 10p capacitors now give feedback network gain 0.5 instead of 0.05, and the greater loop gain at high frequencies will require internal amplifier compensation for a closed loop gain of 2 instead of 20. This is bad news, needing a far higher internal compensation capacitor, with typically far poorer maximum slew rate and less feedback, so higher distortion at high frequencies.
We need to use a far smaller capacitor value in parallel with the 200k, and if the input capacitance is known to be 10pF we need to use 0.5pF. The result is shown next.
This gives a flat phase response with a low Z source, but a large negative phase over a dangerously high frequency range with a high Z. There is also the problem of finding a 0.5pF capacitor, such low values are not readily available, and stray circuit board capacitances could anyway make the result inaccurate.
The next step is to avoid the problem of small and unpredictable capacitances by adding larger values in parallel. The feedback capacitance is again 10pF, but 200pF is now added in parallel with the small input capacitance, and the feedback network now has gain under 0.05 at high frequencies, and internal compensation can once more be reduced to the level which would normally be needed for closed loop gain 20.
The closed loop gain is not actually 20 at high frequencies because the 10p in parallel with 200k reduces the gain by 3dB around 80kHz above which it falls at 6dB per octave, however we now have the required feedback network gain. The 200pF connected to earth might be expected to increase high frequency noise a little, but the falling response above 80kHz will reduce noise to compensate.
The phase is now flat with low Z source:
With high source Z there is again a phase lag but in a lower frequency range further from the unity gain frequency, which need not be a serious problem if taken into account in the complete design.
This more or less solves all the problems, but there is some advantage in using a low-pass filter at the amplifier input to reduce high frequency interference and other unwanted non-audio signals, and this may interact with the feedback network. An example is shown next, with a 560p capacitor added, followed by the phase shifts:
The phase lag with a high Z source has again been pushed down to a lower frequency range.
There is one more change which appears to be an advantage. The gain round the feedback loop can be reduced at high frequencies by increasing the 200p capacitor. Using 390p we now only require compensation for closed loop gain 40 instead of 20, and then the internal compensation needed can be reduced by a similar factor. The phase shifts are only slightly worse, and unless the capacitor is increased too far there should still be some advantage. The final circuit and its phase shifts are next. This is more or less the arrangement used in my mosfet amplifier designs.
