RE: [PROTEL EDA USERS]: Re: PLD support

[Robison Michael R CNIN <Robison_M@crane.navy.mil>]

i actually had several jedec files which i could use from a vendor's
docs (we bought them).  but one of them i needed to change quite
a bit.  i had drawn out gate-level drawings of them (just 22v10s) so
i pretty much knew what i wanted.  

i hand-changed the one jedec file and it flew ok when i did a software
simulation (using a teradyne product called LASAR), but much to 
my chagrin, the burner would have nothing to do with my hacked
jedec, so i had to wade on in and do it using CUPL.

i'm glad to hear that the simple ones seem to burn ok.

thanks, miker



> -----Original Message-----
> From:	Jon Elson [SMTP:jmelson@artsci.wustl.edu]
> Sent:	Tuesday, October 17, 2000 5:03 PM
> To:	Multiple recipients of list proteledausers
> Subject:	[PROTEL EDA USERS]:  Re: PLD support
> 
> 
> 
> Robison Michael R CNIN wrote:
> 
> > hi phan,
> >
> > can you extrapolate a bit on your PLD comments about Protel?  are we
> > talking about the CUPL language and producing jedec files here?  cuz
> > i'm getting ready to attempt to burn a pal using a jedec i produced with
> > the CUPL, and it'd be nice to know about any bugs in it.
> 
> You mean you did this using Protel?  If the pieces of the software
> (schematic
> libraries, if used; part libraries, device specific code generators, etc.)
> are all in place for the manufacturer and device, then it generally works
> OK.  The problem is there are SO MANY pieces required, that many
> manufacturers and/or specific parts are not properly supported.
> Xilinx is one in particular that has bad support.  The fitters/mappers
> are over 10 years old, and Xilinx has introduces about 6 new device
> families since then.  This is generally larger stuff than just PALs.
> 
> Jon
> 
> 
>