low power sram

A six-transistor CMOS SRAM cell.

Static random access memory (SRAM) is a type of semiconductor memory. The word "static" indicates that the memory retains its contents as long as power remains applied, unlike dynamic RAM (DRAM) that needs to be periodically refreshed. (Nevertheless, SRAM should not be confused with read-only memory and flash memory, since it is volatile memory and preserves data only while power is continuously applied. ) SRAM should not be confused with SDRAM, which stands for synchronous DRAM and is entirely different from SRAM, or with pseudostatic RAM (PSRAM), which is DRAM disguised as SRAM.

Design

Random access means that locations in the memory can be written to or read from in any order, regardless of the memory location that was last accessed. Development of a low-power SRAM compiler--[electronic resource] /--Meenatchi Jagasivamani.

Each bit in an SRAM is stored on four transistors that form two cross-coupled inverters. This storage cell has two stable states which are used to denote 0 and 1. Two additional access transistors serve to control the access to a storage cell during read and write operations. It thus typically takes six MOSFETs to store one memory bit.

Access to the cell is enabled by the word line (WL in figure) which controls the two access transistors M5 and M6 which, in turn, control whether the cell should be connected to be bit lines: BL and BL. They are used to transfer data for both read and write operations. interface with the CPU at speeds not attainable by DRAMs and to replace DRAMs in systems.

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