[PROTEL EDA USERS]: Re: file with bad connectivity problem

[Jon Elson <jmelson@artsci.wustl.edu>]

Abd ul-Rahman Lomax wrote:

> At 10:54 PM 8/30/00 -0500, you wrote:
>
> There are a number of problems with this board.

Well, problem solved!  And, it comes with a story.

This board is in the 4th major revision, it was originally designed
in Tango PCB.  There was a bug in the Tango import routine
in the Protel 2.x series.  It took component footprint or type
information that had been moved to a mechanical layer and
put it on the copper layer!  but, that was quickly fixed by
a global change to hide all component comments.  this was
fine in 2.8, but it has a totally different effect in 99SE.
In 2.8, hidden comments are treated as if they don't
exist, for connectivity purposes.  In 99SE, they are treated
as if they DO exist for connectivity, but are not displayed!

So, of course, all these 800 pieces of text on the top copper
layer, but not being displayed, caused havoc with anything
that needed to trace out connectivity!  So, the update primitives
from component pads went totally haywire, DRC gave
VERY misleading results, load nets did funny things,
and all the utilities like select copper seemed to select
almost everything.

It was only when I finally READ the DRC file, instead of just
glancing at it, that I saw that the short circuit listing was full
of (trace, pad, via) shorted to TEXT!  Finally it hit me what
was going on!

So, it really is a lot of history piled together that caused this
problem!  Once I knew what was causing it, it only took a
couple of minutes to globally edit all those component comments
to the mechanical layer where I put that stuff normally.

Thanks, everybody, for all the help on this, and especially Abd ul-Rahman
for actually looking at the file!

Jon