Re: [PROTEL EDA USERS]: Design rule vias under smd constraint

[Jon Elson <jmelson@artsci.wustl.edu>]

Nicholas Cobb wrote:

> How come the design rule for vias under SMD constraint says in its
> description that it "specifies whether vias can be placed under SMD pads
> during autorouting", but when you add a rule it says that the rule is not
> followed by the autorouter?

Design rules, in general, are things that the design rule checker function
knows how to detect.  The autorouter was apparently developed separately
and then merged into Protel99.  It only supports a small number of the
most standard design rules, ie. spacing, track width, etc.
This is confusing at best, and pretty limiting to what you can get the
autorouter to do at the worst.  Simple designs with DIP parts on a
regular grid are handled with mediocre results.  Complex designs
with many layers, varied SMT component pitch and very high
densities are handled with ghastly results, leading to great amounts
of manual cleanup.  I can usually reduce via count to 30 - 50% of
the original via count without working hard.  Even getting the autorouter
to route +5 and GND with thick traces in an orderly manner seems
impossible.

Jon