Re: [PROTEL EDA USERS]: Multiple GND nets and I want no plane connection for one of them...

[Abd ul-Rahman Lomax <marjan@vom.com>]

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At 01:59 PM 9/10/00 -0400, D. Chris Mackensen wrote:
>Hey... I was going to ask the question where I have multiple different GND
>nets and I do not want some of the pads to connect to the GND plane
>(separate higher current return to a starred ground connection).
>
>But I was able to make a pad class and make a rule for plane connect style
>(no connect) with this pad class... works pretty slick...  so I guess I
>answered my own question...

This will work, and it has the virtue of simplicity, but DRC will not 
detect any shorts btween the "different ground nets", since all grounded 
primitives, whether they are in the high-current section or otherwise, will 
have the same net assignment. Further, the assignment of the pads to the 
no-connect pad class is manual, and could get quite complex; and thus prone 
to error.

There is a better way, in my opinion, which is to use separate nets on the 
schematic for each leg of the ground which should be isolated from the 
others. Then jumpers are placed on the schematic to short the legs 
together. Sometimes one would also place normal jumpers on the schematic, 
or zero-ohm resistors; but if it is desired to have a hard short between 
the sections, I have previously described on this list what I call a 
virtual short. (To be more accurate, it is a virtual open, but sometimes 
precision can be less than informative.)

This is a part having a footprint with two pads (or more) which are 
separated from each other in the PCB database by perhaps .004 mil. Yes, 4 
micro-inches. Then a clearance design rule allows that part to have a 
clearance of .002 mils. I forget the exact implementation I've used at the 
moment, but you can get the idea. For a whole series of reasons, these pads 
will be shorted in the gerber and on the films and on the board, but for 
netlist purposes, they are separate.

This provides schematic-driven control over the division of the ground into 
subnets, and the location of the star on the PCB is explicit.

Sometimes designers, instead of using the kind of part I have described, 
simply short the jumpers as the last step before generating gerber. This 
will produce a DRC error, of course, but it is done after everything else 
is complete, and another designer later can readily see what has been done 
if the net names are descriptive.


marjan@vom.com
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433



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