Re: [PROTEL EDA USERS]: Via size

[Hans <hans2@seas.upenn.edu>]

Thanks for that help ... it was pretty much the approach I was taking and
I wrote the Email before doing any approximations. Since circumference is
linear with radius, it makes sense that the cross-sectional area increases
linearly with radius. Thickness is the big player in the game contributing
in the 1st and 2nd order to the area.  From VLSI experience, I know that a
common trick is to places multiple vias in an array and the 'first' one is
not going to be 'hot'. The vias pretty much share the same potential on 
either side of the board (unless we are taking about really thin traces 
conencting them.) I was wondering more along the lines if there were any 
rules of thumb, e.g. for 1A, the area should be at least xxx sq.in. - 
I'll probably have vias that are big enough but I was wondering if there 
were any such 'tricks of the trade'. Anyway, thanks for the time you put 
into this question. 

Hans

-- 

Hans J. Eberhart

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http://www.seas.upenn.edu/~hans2