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List of my publications including unpublished papers    and technical reports

 

Publications

N Venkateswaran, R Rajesh, N Sudarshan, R Rajasimhan, C Chandramouli, R Chidambareswaran, B Harish, Kolluru Arvind, M Muhilan y(PSI)NAM For Massive Neuronal Assembly Modeling: Part-I, Processing Elements, The 6th International Conference on Computational Intelligence and Natural Computing, 2003

Abstract

The title y(PSI)NAM stands for Parallel SImulation (y-PSI) for Neuronal Assembly Model(NAM). An instruction driven NAM processor architecture had been proposed to model a complex stochastic neuronal assembly, capable of modeling a wide class of neuronal models including the stochastic model. However, modeling the neuronal assembly using this processor will be computationally inefficient as it does not include special functional units to model the signal processing characteristics of complex dendritic tree structure. This paper proposes two processor architectures: one based on mixed signal approach - the Mixed signal NAM (MNAM) processor,and the other based on digital approach - the Digital Dendritic NAM (DDNAM) processor. In reality, modeling the complex brain functions and its fault simulation demands enormous computational resources beyond the number crunching capability of either a single MNAM or a single DDNAM processor. The companion paper, Part-II proposes a novel array architecture to meet this end. Insert contents.

 DOCUMENT IN PDF

N Venkateswaran, R Chidambareswaran, B Harish, Kolluru Arvind, C Chandramouli, R Rajesh, N Sudarshan, R Rajasimhan,, y(PSI)NAM For Massive Neuronal Assembly Modeling: Part-II, The Array Architectures, The 6th International Conference on Computational Intelligence and Natural Computing, 2003

Abstract

The proposed processors in "y(PSI)NAM For Massive Neuronal Assembly Modeling: Part-I,Processing Elements" DDNAM and MNAM, are effective for small-scale neuronal assembly modeling. Realistic modeling of massive neuronal assemblies demands enormous computation resources beyond the number crunching capability of either a MNAM or a DDNAM processor. This has led to the design of two array processors, based on mixed signal and digital approaches for brain function modeling. Extensive Simulation of these array architectures for modeling assemblies and a comparative analysis with published experimental results were carried out. The comparison shows the fulfillment of the objective of the array processor with regards to realistic modeling of massive neuronal assemblies. For neuronal modeling, Array processors with specialized processing elements, like NAMs, have ever been proposed. Insert contents.

DOCUMENT IN PDF

 Unpublished Work (Tech Reports)

N Venkateswaran, R Chidambareswaran, B Harish, Kolluru Arvind,Integrated Process for Simulating the Retinal Pathway on the Special Purpose Neuronal Assembly Model Array Processor , WTR-CH-03.

Abstract

This paper presents the integration of existing mathematical models of the photoreceptors, the horizontal, the bipolar and the ganglion cells, for simulating the shape recognition processes occurring along the retinal pathway. The simulation of the retinal pathway further involves integration of Biologically realistic models of synapses, Green’s function based model of dendritic trees & Hodgkin Huxley(HH) models of neuronal cells. The entire simulation process has been carried out on the special purpose Neuronal Assembly Model Array Processor(NAMAP) model. Integrated simulation of the retina pathway involving large number of neurons has not been carried out on a special purpose array processor such as NAMAP.Two case studies pertaining to shape recognition process are presented to demonstrate the capability of NAMAP to simulate the retinal pathway.

DOCUMENT IN PDF

N Venkateswaran, R Chidambareswaran, B Harish, Kolluru Arvind, DNA Based Evolvable Instruction Set Architecture & Arithmetic Unit, WTR-CH-04.

Abstract

The paper proposes a novel DNA based concept towards the natural evolution of instruction set architecture and arithmetic unit. Silicon based conventional systems have insignificant storage and huge hardware size when compared with DNA based systems. The silicon systems can never have natural evolution. Current intelligent systems based on Artificial Intelligence concepts falsify the basic law of evolution. Huge silicon systems are designed and fabricated and treating them as idiots, a learning process is evolved to train them. It is just like allowing a baby to grow into an adult and then trying to teach them ”ABCD”. On the other hand DNAAP (DNA based Arithmetic Processing unit), naturally evolves with time into a larger intelligent system as and when it learns.

DOCUMENT IN PDF

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Copyright(c) 2003 Harish Barathvajasankar